QuTech announced the development of a novel quantum chip architecture called Qubit-Array Research Platform for Engineering and Testing (QARPET), a breakthrough designed to simplify the evaluation of large numbers of semiconductor spin qubits and support future scaling of quantum processors. QARPET consolidates hundreds of qubits within a single test chip and allows comprehensive characterization under realistic experimental conditions, advancing semiconductor-based quantum technologies.
The platform is engineered to address one of the critical challenges in quantum computing research — efficiently assessing qubit performance and uniformity across large arrays — using a crossbar control line design that minimizes wiring complexity as array size grows. Instead of testing qubit devices individually, scientists can now evaluate qubit performance statistically across repeatable tiles that each contain two spin qubits and a charge sensor, forming self-contained measurement units within a scalable grid.
“With such a complex, tightly packed quantum chip, things really start to resemble the traditional semiconductor industry,” states Giordano Scappucci, lead researcher.
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The QARPET chip design uses a crossbar layout where rows and columns share control lines, enabling individual selection and probing of each tile without a proportional increase in wiring or reliance on intricate cryogenic electronics. The initial demonstration chip, constructed from a germanium/silicon-germanium (Ge/SiGe) semiconductor stack, features a 23 × 23 tile grid capable of potentially hosting up to 1,058 hole-spin qubits while requiring only 53 control lines — showcasing a highly compact and efficient architecture.
“When I designed the first layouts, I honestly did not expect them to work,” says Alberto Tosato, who did the engineering. “The number of crossing electrodes is extremely high. It pushes the limits of nanofabrication, we saw it as a test that would probably fail. So, seeing the device come alive at millikelvin temperatures, that was a very satisfying moment.”
Beyond structural innovation, QARPET supports high-frequency electrical readout, enabling detailed measurement of tile performance and revealing key device parameters such as threshold voltages and charge noise levels. These statistical insights are critical for improving reproducibility and reliability in future quantum devices and provide a practical testing vehicle for novel semiconductor materials and device designs under real-world conditions.
“Building a large-scale quantum processor is not just a matter of adding more qubits,” says Giordano Scappucci, Associate Professor at TU Delft. “To make progress, we need to understand how qubits perform statistically, how uniform they are, how noisy they are, and how these properties vary across a chip. This really sets QARPET apart.”
Because QARPET is compatible with established semiconductor fabrication techniques and supports modular adaptation to other material systems, including silicon-based qubits, it offers a promising pathway toward broader automation and machine-learning-assisted device optimization — further accelerating the development of scalable quantum computing technologies.
SOURCE: QuTech