IBM Unveils World’s First Sub-1nm Chip Technology with Nanostack Architecture

IBM

IBM has announced a major semiconductor milestone with the unveiling of the world’s first sub-1 nanometer (0.7 nm/7 angstrom) chip technology, introducing a groundbreaking three-dimensional “nanostack” transistor architecture that extends chip scaling beyond the nanometer era. The chip features nearly 100 billion transistors on a single chip about the size of a fingernail-which makes it almost double the number in IBM’s previous 2 nm chip that was revealed in 2021-and the chip technology is said to address the physical limits of traditional chip technology. Featuring structural and material advancements, like vertically arranged nanosheet transistors and different materials for each of the layers, the new chip technology not only offers a higher transistor density but can use different materials within each layer for optimizing performance and power efficiency separately.

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As per IBM, the new technology is expected to offer around 50% higher performance or 70% more efficient than the company’s 2 nm chips and is ideal for heavy usage, like generative AI and cloud computing, among others. Researchers also demonstrated a 40% SRAM scaling improvement, supporting higher-bandwidth AI applications. “IBM’s latest chip breakthrough marks a landmark moment in computing, pushing technology beyond the nanometer era to the scale of atoms. With our new nanostack architecture, we’re not just making smaller transistors, we’re reinventing how chips are built to deliver dramatically more power and energy efficiency,” said Jay Gambetta, Director of IBM Research and IBM Fellow. “This industry-first innovation continues IBM’s legacy of leading in next-generation technologies and sets the foundation for the next era of computing.”

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