Microchip Unveils PCIe 6.0 and CXL 3.1 Retimers to Power Scalable AI Data Center Fabrics

Microchip

Microchip Technology has introduced XpressConnect™ PCIe® 6.0 and CXL® 3.1 retimers. These boost memory expansion and high-bandwidth connections for big AI systems. They stretch signal range past regular PCIe Gen 5 and Gen 6 limits. This lets systems work better across complex boards and cables too. And, they fit into tight thermal and power limits in packed AI setups. A key feature is pin-to-pin latency below 12 nanoseconds, which Microchip says is roughly 80% lower than PCIe 6.0 specification limits, helping reduce data stalls and improve utilization of AI accelerators and GPUs. “AI data centers are increasingly constrained not by compute, but by the ability to move data efficiently across the system. As PCIe 6.0 pushes speeds to 64 GT/s, signal reach and latency become critical design challenges,” said Brian McCarson, corporate vice president and GM of Microchip’s data center solutions business unit.

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“Our XpressConnect retimers are designed to act as the high‑performance nerve center of the AI server, helping customers build more scalable, power‑efficient fabrics by reducing latency and improving connectivity across dense GPU clusters. This system‑level approach allows data center architects to reclaim underutilized resources and improve overall platform efficiency at scale.” They also integrate with Microchip’s ChipLink diagnostic ecosystem for real-time eye capture and PAM4 telemetry, simplifying link monitoring and troubleshooting. Support for PCIe Gen 3, Gen 4, and Gen 5 platforms, flexible bifurcation configurations, hot-plug capability, and enterprise-grade data integrity features is intended to reduce deployment risk and time to market for hyperscale and enterprise AI environments.

Read More: XpressConnect™ PCIe® 6.0 and CXL 3.1 Retimers Address Latency and Signal‑Integrity Challenges in AI Data Centers